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Celeron 850 MHz ES
Week 10, Year 2001RB80526RY850128 / Q110A361-0680 QBC6ES
An early engineering sample of the Celeron 850, one of the first Celeron with a 100 MHz front side bus after they switched from 66 MHz FSB. Based on a 0.18 µm coppermine core, this CPU includes 128 KB of L2 cache and the SSE instructions. It was built in March 2001 while intel announced the Celeron 850 on April, 9th 2001.
